Design and Implementation of High Speed, Low Power to-bit DAC for Video Application

Digital to analog converters are crucial components in many communication and signal processing systems. Video DAC is used in RAMDAC circuit, used to convert the digital signal to analog signal for the video and pictures to be displayed on a display unit. This kind of video DAC is used in high resolution display for computer graphics and HDTV's. The goal of this project was to design a high speed, low power 10-bit, digital-to-analog converter in CMOS 0.18micron technology, which makes it suitable for video application. For designing the porticular DAC a bottom up hierarchical method is adopted. First according to the specification, the design of aspect ratio of the transistors used in our design is done. There were many challenges throughout the design process, including determining the matching requirements of the devices, investigating what percentage of segmentation to be used to design the whole system. For checking the functionality of the whole system a spice code is written using Hspice by defining all blocks in the circuit as sub circuits. Then a schematic capture is done using schematic composer from virtuoso stating from bottom level to top level. Finally the layout for the complete DAC is done using virtuoso. This poper describes a segmented architecture based DAC consisting of an 8 bit unary coded current steering architecture for MSB and 2 bit binary weighted architecture for LSB's. The whole system is designed for a full swing current output of 0-13mA and dissipates a total power of 185mW. The measured differential nonlinearity and integral nonlinearity are ± 0.01 LSB and -0.6/+0.2 LSB, respectively. A full custom layout is drawn that occupies a less area about O. I05mm2 with out IO pods.